17#ifndef CPU_FEATURES_INCLUDE_INTERNAL_HWCAPS_H_
18#define CPU_FEATURES_INCLUDE_INTERNAL_HWCAPS_H_
31#define AARCH64_HWCAP_FP (1UL << 0)
32#define AARCH64_HWCAP_ASIMD (1UL << 1)
33#define AARCH64_HWCAP_EVTSTRM (1UL << 2)
34#define AARCH64_HWCAP_AES (1UL << 3)
35#define AARCH64_HWCAP_PMULL (1UL << 4)
36#define AARCH64_HWCAP_SHA1 (1UL << 5)
37#define AARCH64_HWCAP_SHA2 (1UL << 6)
38#define AARCH64_HWCAP_CRC32 (1UL << 7)
39#define AARCH64_HWCAP_ATOMICS (1UL << 8)
40#define AARCH64_HWCAP_FPHP (1UL << 9)
41#define AARCH64_HWCAP_ASIMDHP (1UL << 10)
42#define AARCH64_HWCAP_CPUID (1UL << 11)
43#define AARCH64_HWCAP_ASIMDRDM (1UL << 12)
44#define AARCH64_HWCAP_JSCVT (1UL << 13)
45#define AARCH64_HWCAP_FCMA (1UL << 14)
46#define AARCH64_HWCAP_LRCPC (1UL << 15)
47#define AARCH64_HWCAP_DCPOP (1UL << 16)
48#define AARCH64_HWCAP_SHA3 (1UL << 17)
49#define AARCH64_HWCAP_SM3 (1UL << 18)
50#define AARCH64_HWCAP_SM4 (1UL << 19)
51#define AARCH64_HWCAP_ASIMDDP (1UL << 20)
52#define AARCH64_HWCAP_SHA512 (1UL << 21)
53#define AARCH64_HWCAP_SVE (1UL << 22)
54#define AARCH64_HWCAP_ASIMDFHM (1UL << 23)
55#define AARCH64_HWCAP_DIT (1UL << 24)
56#define AARCH64_HWCAP_USCAT (1UL << 25)
57#define AARCH64_HWCAP_ILRCPC (1UL << 26)
58#define AARCH64_HWCAP_FLAGM (1UL << 27)
59#define AARCH64_HWCAP_SSBS (1UL << 28)
60#define AARCH64_HWCAP_SB (1UL << 29)
61#define AARCH64_HWCAP_PACA (1UL << 30)
62#define AARCH64_HWCAP_PACG (1UL << 31)
64#define AARCH64_HWCAP2_DCPODP (1UL << 0)
65#define AARCH64_HWCAP2_SVE2 (1UL << 1)
66#define AARCH64_HWCAP2_SVEAES (1UL << 2)
67#define AARCH64_HWCAP2_SVEPMULL (1UL << 3)
68#define AARCH64_HWCAP2_SVEBITPERM (1UL << 4)
69#define AARCH64_HWCAP2_SVESHA3 (1UL << 5)
70#define AARCH64_HWCAP2_SVESM4 (1UL << 6)
71#define AARCH64_HWCAP2_FLAGM2 (1UL << 7)
72#define AARCH64_HWCAP2_FRINT (1UL << 8)
73#define AARCH64_HWCAP2_SVEI8MM (1UL << 9)
74#define AARCH64_HWCAP2_SVEF32MM (1UL << 10)
75#define AARCH64_HWCAP2_SVEF64MM (1UL << 11)
76#define AARCH64_HWCAP2_SVEBF16 (1UL << 12)
77#define AARCH64_HWCAP2_I8MM (1UL << 13)
78#define AARCH64_HWCAP2_BF16 (1UL << 14)
79#define AARCH64_HWCAP2_DGH (1UL << 15)
80#define AARCH64_HWCAP2_RNG (1UL << 16)
81#define AARCH64_HWCAP2_BTI (1UL << 17)
82#define AARCH64_HWCAP2_MTE (1UL << 18)
85#define ARM_HWCAP_SWP (1UL << 0)
86#define ARM_HWCAP_HALF (1UL << 1)
87#define ARM_HWCAP_THUMB (1UL << 2)
88#define ARM_HWCAP_26BIT (1UL << 3)
89#define ARM_HWCAP_FAST_MULT (1UL << 4)
90#define ARM_HWCAP_FPA (1UL << 5)
91#define ARM_HWCAP_VFP (1UL << 6)
92#define ARM_HWCAP_EDSP (1UL << 7)
93#define ARM_HWCAP_JAVA (1UL << 8)
94#define ARM_HWCAP_IWMMXT (1UL << 9)
95#define ARM_HWCAP_CRUNCH (1UL << 10)
96#define ARM_HWCAP_THUMBEE (1UL << 11)
97#define ARM_HWCAP_NEON (1UL << 12)
98#define ARM_HWCAP_VFPV3 (1UL << 13)
99#define ARM_HWCAP_VFPV3D16 (1UL << 14)
100#define ARM_HWCAP_TLS (1UL << 15)
101#define ARM_HWCAP_VFPV4 (1UL << 16)
102#define ARM_HWCAP_IDIVA (1UL << 17)
103#define ARM_HWCAP_IDIVT (1UL << 18)
104#define ARM_HWCAP_VFPD32 (1UL << 19)
105#define ARM_HWCAP_LPAE (1UL << 20)
106#define ARM_HWCAP_EVTSTRM (1UL << 21)
107#define ARM_HWCAP2_AES (1UL << 0)
108#define ARM_HWCAP2_PMULL (1UL << 1)
109#define ARM_HWCAP2_SHA1 (1UL << 2)
110#define ARM_HWCAP2_SHA2 (1UL << 3)
111#define ARM_HWCAP2_CRC32 (1UL << 4)
114#define MIPS_HWCAP_R6 (1UL << 0)
115#define MIPS_HWCAP_MSA (1UL << 1)
116#define MIPS_HWCAP_CRC32 (1UL << 2)
119#ifndef _UAPI__ASM_POWERPC_CPUTABLE_H
121#define PPC_FEATURE_32 0x80000000
122#define PPC_FEATURE_64 0x40000000
123#define PPC_FEATURE_601_INSTR 0x20000000
124#define PPC_FEATURE_HAS_ALTIVEC 0x10000000
125#define PPC_FEATURE_HAS_FPU 0x08000000
126#define PPC_FEATURE_HAS_MMU 0x04000000
127#define PPC_FEATURE_HAS_4xxMAC 0x02000000
128#define PPC_FEATURE_UNIFIED_CACHE 0x01000000
129#define PPC_FEATURE_HAS_SPE 0x00800000
130#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000
131#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000
132#define PPC_FEATURE_NO_TB 0x00100000
133#define PPC_FEATURE_POWER4 0x00080000
134#define PPC_FEATURE_POWER5 0x00040000
135#define PPC_FEATURE_POWER5_PLUS 0x00020000
136#define PPC_FEATURE_CELL 0x00010000
137#define PPC_FEATURE_BOOKE 0x00008000
138#define PPC_FEATURE_SMT 0x00004000
139#define PPC_FEATURE_ICACHE_SNOOP 0x00002000
140#define PPC_FEATURE_ARCH_2_05 0x00001000
141#define PPC_FEATURE_PA6T 0x00000800
142#define PPC_FEATURE_HAS_DFP 0x00000400
143#define PPC_FEATURE_POWER6_EXT 0x00000200
144#define PPC_FEATURE_ARCH_2_06 0x00000100
145#define PPC_FEATURE_HAS_VSX 0x00000080
147#define PPC_FEATURE_PSERIES_PERFMON_COMPAT 0x00000040
150#define PPC_FEATURE_TRUE_LE 0x00000002
151#define PPC_FEATURE_PPC_LE 0x00000001
154#define PPC_FEATURE2_ARCH_2_07 0x80000000
155#define PPC_FEATURE2_HTM 0x40000000
156#define PPC_FEATURE2_DSCR 0x20000000
157#define PPC_FEATURE2_EBB 0x10000000
158#define PPC_FEATURE2_ISEL 0x08000000
159#define PPC_FEATURE2_TAR 0x04000000
160#define PPC_FEATURE2_VEC_CRYPTO 0x02000000
161#define PPC_FEATURE2_HTM_NOSC 0x01000000
162#define PPC_FEATURE2_ARCH_3_00 0x00800000
163#define PPC_FEATURE2_HAS_IEEE128 0x00400000
164#define PPC_FEATURE2_DARN 0x00200000
165#define PPC_FEATURE2_SCV 0x00100000
166#define PPC_FEATURE2_HTM_NO_SUSPEND 0x00080000
#define CPU_FEATURES_START_CPP_NAMESPACE
Definition cpu_features_macros.h:127
#define CPU_FEATURES_END_CPP_NAMESPACE
Definition cpu_features_macros.h:128
HardwareCapabilities CpuFeatures_GetHardwareCapabilities(void)
const char * CpuFeatures_GetBasePlatformPointer(void)
bool CpuFeatures_IsHwCapsSet(const HardwareCapabilities hwcaps_mask, const HardwareCapabilities hwcaps)
const char * CpuFeatures_GetPlatformPointer(void)
unsigned long hwcaps2
Definition hwcaps.h:171
unsigned long hwcaps
Definition hwcaps.h:170